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» A Distributed Control Path Architecture for VLIW Processors
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HPCA
2001
IEEE
14 years 8 months ago
Reevaluating Online Superpage Promotion with Hardware Support
fipical translation lookaside buffers (TLBs)can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the per...
Zhen Fang, Lixin Zhang, John B. Carter, Wilson C. ...
SENSYS
2004
ACM
14 years 1 months ago
TinySec: a link layer security architecture for wireless sensor networks
We introduce TinySec, the first fully-implemented link layer security architecture for wireless sensor networks. In our design, we leverage recent lessons learned from design vul...
Chris Karlof, Naveen Sastry, David Wagner
MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
13 years 7 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
14 years 15 days ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
ISPAN
2005
IEEE
14 years 1 months ago
A Self-stabilizing Link-Cluster Algorithm in Mobile Ad Hoc Networks
We design a self-stabilizing cluster routing algorithm based on the link-cluster architecture of wireless ad hoc networks. The network is divided into clusters. Each cluster has a...
Doina Bein, Ajoy Kumar Datta, Chakradhar R. Jaggan...