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TCAD
2002
135views more  TCAD 2002»
13 years 7 months ago
Area fill synthesis for uniform layout density
Chemical-mechanical polishing (CMP) and other manufacturing steps in very deep submicron VLSI have varying effects on device and interconnect features, depending on local character...
Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexande...
AOSD
2009
ACM
14 years 2 months ago
Modelling hardware verification concerns specified in the e language: an experience report
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
Darren Galpin, Cormac Driver, Siobhán Clark...
CMSB
2007
Springer
14 years 1 months ago
Expressive Models for Synaptic Plasticity
We explore some presynaptic mechanisms of the calyx of Held synapse through a stochastic model. The model, drawn from a kinetic approach developed in literature, exploits process c...
Andrea Bracciali, Marcello Brunelli, Enrico Catald...
IJAR
2002
102views more  IJAR 2002»
13 years 7 months ago
Networks of probabilistic events in discrete time
The usual methods of applying Bayesian networks to the modeling of temporal processes, such as Dean and Kanazawa's dynamic Bayesian networks (DBNs), consist in discretizing t...
Severino F. Galán, Francisco Javier D&iacut...
RECOMB
2004
Springer
14 years 8 months ago
Comparing in situ mRNA expression patterns of drosophila embryos
In situ staining of a target mRNA at several time points during the development of a D. melanogaster embryo gives one a detailed spatio-temporal view of the expression pattern of ...
Hanchuan Peng, Eugene W. Myers