90 search results - page 6 / 18 » A Dynamically Adaptable Hardware Transactional Memory |
DSD
2010
IEEE
13 years 7 months ago
2010
IEEE
Abstract—Resizable caches can trade-off capacity for access speed to dynamically match the needs of the workload. In Simultaneous Multi-Threaded (SMT) cores, the caching needs ca...
CASES
2004
ACM
14 years 1 months ago
2004
ACM
+ With more applications being deployed on embedded platforms, software protection becomes increasingly important. This problem is crucial on embedded systems like financial transa...
VISUALIZATION
2005
IEEE
14 years 1 months ago
2005
IEEE
We present a system for three-dimensional visualization of complex Liquid Chromatography - Mass Spectrometry (LCMS) data. Every LCMS data point has three attributes: time, mass, a...
APCSAC
2004
IEEE
13 years 11 months ago
2004
IEEE
Dynamic optimization presents opportunities for finding run-time bottlenecks and deploying optimizations in statically compiled programs. In this paper, we discuss our current impl...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...