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» A Fault Modeling Technique to Test Memory BIST Algorithms
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ICCAD
1999
IEEE
148views Hardware» more  ICCAD 1999»
14 years 2 days ago
SAT based ATPG using fast justification and propagation in the implication graph
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
Paul Tafertshofer, Andreas Ganz
ICS
2004
Tsinghua U.
14 years 1 months ago
Adaptive incremental checkpointing for massively parallel systems
Given the scale of massively parallel systems, occurrence of faults is no longer an exception but a regular event. Periodic checkpointing is becoming increasingly important in the...
Saurabh Agarwal, Rahul Garg, Meeta Sharma Gupta, J...
CDB
2004
Springer
143views Database» more  CDB 2004»
14 years 1 months ago
Constraint Processing Techniques for Improving Join Computation: A Proof of Concept
Constraint Processing and Database techniques overlap significantly. We discuss here the application of a constraint satisfaction technique, called dynamic bundling, to databases....
Anagh Lal, Berthe Y. Choueiry
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 4 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
DFT
1999
IEEE
75views VLSI» more  DFT 1999»
14 years 3 days ago
A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths
Fault identification capabilities are becoming increasingly important in modern designs, not only in support of design debugging methodologies, but also for the purpose of process...
Yiorgos Makris, Alex Orailoglu