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» A Field-Programmable Mixed-Analog-Digital Array
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FPL
2008
Springer
98views Hardware» more  FPL 2008»
13 years 11 months ago
Comparing throughput and power consumption in both sequential and reconfigurable processors
Recent improvements in the memory capacity of Field Programmable Gate Arrays (FPGAs) have spurred interest in using the devices for arithmetic floating-point operations. However, ...
Kevin K. Liu, Charles B. Cameron, Antal A. Sarkady
DSD
2005
IEEE
123views Hardware» more  DSD 2005»
14 years 3 months ago
Hardware-Based Implementation of the Common Approximate Substring Algorithm
An implementation of an algorithm for string matching, commonly used in DNA string analysis, using configurable technology is proposed. The design of the circuit allows for pipeli...
Kenneth B. Kent, Sharon Van Schaick, Jacqueline E....
ISCAS
2005
IEEE
187views Hardware» more  ISCAS 2005»
14 years 3 months ago
Built-in self-test for automatic analog frequency response measurement
—We present a Built-In Self-Test (BIST) approach based on direct digital synthesizer (DDS) for functionality testing of analog circuitry in mixed-signal systems. DDS with Delta-S...
Dayu Yang, Foster F. Dai, Charles E. Stroud
ITCC
2005
IEEE
14 years 3 months ago
FPGA Implementations of the ICEBERG Block Cipher
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...
François-Xavier Standaert, Gilles Piret, Ga...
FPL
2005
Springer
96views Hardware» more  FPL 2005»
14 years 3 months ago
FPGA PLB Evaluation using Quantified Boolean Satisfiability
This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...