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» A Gradually Proceeded Software Architecture Design Process
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ICCD
2008
IEEE
159views Hardware» more  ICCD 2008»
14 years 5 months ago
Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor
— Heterogeneous Chip Multiprocessors (HMPs), such as the Cell Broadband Engine, offer a new design optimization opportunity by allowing designers to provide accelerators for appl...
Michael Gschwind
OOPSLA
2009
Springer
14 years 3 months ago
Thorn: robust, concurrent, extensible scripting on the JVM
Scripting languages enjoy great popularity due their support for rapid and exploratory development. They typically have lightweight syntax, weak data privacy, dynamic typing, powe...
Bard Bloom, John Field, Nathaniel Nystrom, Johan &...
DATE
2010
IEEE
147views Hardware» more  DATE 2010»
13 years 11 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok ...
SIGSOFT
2007
ACM
14 years 9 months ago
Model checking service compositions under resource constraints
When enacting a web service orchestration defined using the Business Process Execution Language (BPEL) we observed various safety property violations. This surprised us considerab...
David S. Rosenblum, Howard Foster, Jeff Kramer, Je...
DAC
2006
ACM
14 years 9 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...