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PPOPP
2009
ACM
14 years 9 months ago
Transactional memory with strong atomicity using off-the-shelf memory protection hardware
This paper introduces a new way to provide strong atomicity in an implementation of transactional memory. Strong atomicity lets us offer clear semantics to programs, even if they ...
Martín Abadi, Tim Harris, Mojtaba Mehrara
ISCAS
2002
IEEE
141views Hardware» more  ISCAS 2002»
14 years 1 months ago
Power characterization of digital filters implemented on FPGA
The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nann...
ASAP
2007
IEEE
104views Hardware» more  ASAP 2007»
13 years 10 months ago
Hardware Acceleration for 3-D Radiation Dose Calculation
Abstract— The problem of calculating accurate dose distributions lies in the heart of modern radiation therapy for cancer treatment. Software implementations of dose calculation ...
Bo Zhou, Xiaobo Sharon Hu, Danny Z. Chen, Cedric X...
ESM
1998
13 years 10 months ago
Hardware Modelling and Simulation Using an Object-Oriented Method
In order to reduce the cost, the time-to-market and to make the most pertinent choices, it becomes essential to allow designers to evaluate, very soon in the design phase, a given...
Frédéric Mallet, Fernand Boér...
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
14 years 1 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...