Sciweavers

1998 search results - page 39 / 400
» A Hardware Implementation of PRAM and Its Performance Evalua...
Sort
View
FPL
2010
Springer
129views Hardware» more  FPL 2010»
13 years 7 months ago
FPGA Implementations of the Round Two SHA-3 Candidates
Abstract--The second round of the NIST-run public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). This paper present...
Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilt...
DATE
2005
IEEE
162views Hardware» more  DATE 2005»
14 years 2 months ago
A Model-Based Approach for Executable Specifications on Reconfigurable Hardware
UML 2.0 provides a rich set of diagrams for systems documentation and specification. Many efforts have been undertaken to employ different aspects of UML for multiple domains, mai...
Tim Schattkowsky, Wolfgang Müller 0003, Achim...
FPT
2005
IEEE
142views Hardware» more  FPT 2005»
14 years 2 months ago
Custom Hardware Architectures for Posture Analysis
This paper describes the design and implementation of hardware architectures for posture analysis. Posture analysis is an active research area in computer vision. It can be used i...
M. P. T. Juvonen, José Gabriel F. Coutinho,...
DATE
2010
IEEE
166views Hardware» more  DATE 2010»
14 years 2 months ago
A special-purpose compiler for look-up table and code generation for function evaluation
Abstract—Elementary functions are extensively used in computer graphics, signal and image processing, and communication systems. This paper presents a special-purpose compiler th...
Yuanrui Zhang, Lanping Deng, Praveen Yedlapalli, S...
DSD
2009
IEEE
145views Hardware» more  DSD 2009»
14 years 3 months ago
High Performance Image Processing on a Massively Parallel Processor Array
Multicore and manycore processors are the new wave of computing, offering high performance by using large numbers of simple processors. In this paper, we describe the implementati...
Roberto R. Osorio, Cesar Diaz-Resco, Javier D. Bru...