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ISCA
2003
IEEE
157views Hardware» more  ISCA 2003»
14 years 3 months ago
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage
Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause ...
Michael D. Powell, T. N. Vijaykumar
HPCA
2009
IEEE
14 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
MSS
2007
IEEE
153views Hardware» more  MSS 2007»
14 years 4 months ago
Hybrid Host/Network Topologies for Massive Storage Clusters
The high demand for large scale storage capacity calls for the availability of massive storage solutions with high performance interconnects. Although cluster file systems are rap...
Asha Andrade, Ungzu Mun, Dong Hwan Chung, Alexande...
ICDE
2008
IEEE
149views Database» more  ICDE 2008»
14 years 11 months ago
Sharoes: A Data Sharing Platform for Outsourced Enterprise Storage Environments
Abstract-- With fast paced growth of digital data and exploding storage management costs, enterprises are looking for new ways to effectively manage their data. One such cost-effec...
Aameek Singh, Ling Liu
DAC
2008
ACM
14 years 11 months ago
Broadcast electrode-addressing for pin-constrained multi-functional digital microfluidic biochips
Recent advances in digital microfluidics have enabled lab-on-a-chip devices for DNA sequencing, immunoassays, clinical chemistry, and protein crystallization. Basic operations suc...
Tao Xu, Krishnendu Chakrabarty