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2004
ACM
14 years 27 days ago
Analysis and Performance Results of a Molecular Modeling Application on Merrimac
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. D...
CIBCB
2007
IEEE
13 years 11 months ago
Hybrid Architecture for Accelerating DNA Codeword Library Searching
-- A large and reliable DNA codeword library is the key to the success of DNA based computing. Searching for the set of reliable DNA codewords is an NP-hard problem, which can take...
Qinru Qiu, Daniel J. Burns, Qing Wu, Prakash Mukre
MICRO
2000
IEEE
95views Hardware» more  MICRO 2000»
13 years 7 months ago
A Single-Chip Multiprocessor for Smart Terminals
dards, language abstraction continues unabatrpretation of such high-level abstract languages requires high performance. The MP98 low-power, high-performance microprocessor architec...
Masato Edahiro, Satoshi Matsushita, Masakazu Yamas...
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
14 years 12 days ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
14 years 4 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang