110 search results - page 12 / 22 » A Highly-Configurable Cache Architecture for Embedded System... |
DAC
2008
ACM
14 years 9 months ago
2008
ACM
Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution ...
ECRTS
2005
IEEE
14 years 2 months ago
2005
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. 1 instruction-level cycle-accurate simulator is extended wi...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...