265 search results - page 36 / 53 » A Logic Programming Framework for Combinational Circuit Synt... |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
FMSD
2006
13 years 7 months ago
2006
Synchronous specifications are appealing in the design of large scale hardware and software systems because of their properties that facilitate verification and synthesis. When the...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
CSFW
2004
IEEE
13 years 11 months ago
2004
IEEE
We present a system, BLF, that combines an authorization logic based on the Binder language with a logical framework, LF, able to express semantic properties of programs. BLF is a...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...