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» A Logic for Application Level QoS
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ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
16 years 2 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
LPNMR
2005
Springer
15 years 11 months ago
Inference of Gene Relations from Microarray Data by Abduction
We describe an application of Abductive Logic Programming (ALP) to the analysis of an important class of DNA microarray experiments. We develop an ALP theory that provides a simple...
Irene Papatheodorou, Antonis C. Kakas, Marek J. Se...
VLSID
1999
IEEE
97views VLSI» more  VLSID 1999»
15 years 10 months ago
Improving Area Efficiency of Residue Number System based Implementation of DSP Algorithms
Residue Number System based applications involve modulo-arithmetic which is typically implemented using look-up-tables (LUTs) for a small value of modulus. In this paper, we prese...
M. N. Mahesh, Satrajit Gupta, Mahesh Mehendale
JSYML
2002
81views more  JSYML 2002»
15 years 5 months ago
Modulated Fibring and The Collapsing Problem
Fibring is recognized as one of the main mechanisms in combining logics, with great significance in the theory and applications of mathematical logic. However, an open challenge t...
Cristina Sernadas, João Rasga, Walter Alexa...
FDL
2003
IEEE
15 years 11 months ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...