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DAC
1996
ACM
15 years 10 months ago
Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools
This paper provides a case study that shows how a demanding application stresses the capabilities of today's CAD tools, especially in the integration of products from multipl...
Stephen Dean Brown, Naraig Manjikian, Zvonko G. Vr...
DAC
2011
ACM
14 years 5 months ago
Synchronous sequential computation with molecular reactions
Just as electronic systems implement computation in terms of voltage (energy per unit charge), molecular systems compute in terms of chemical concentrations (molecules per unit vo...
Hua Jiang, Marc D. Riedel, Keshab K. Parhi
DAC
2012
ACM
13 years 8 months ago
Improving gate-level simulation accuracy when unknowns exist
Unknown values (Xs) may exist in a design due to uninitialized registers or blocks that are powered down. Due to X-pessimism in gate-level logic simulation, such Xs cannot be hand...
Kai-Hui Chang, Chris Browy
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
15 years 11 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
FPL
2003
Springer
115views Hardware» more  FPL 2003»
15 years 11 months ago
Programmable Asynchronous Pipeline Arrays
We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data...
John Teifel, Rajit Manohar