383 search results - page 4 / 77 » A Methodology for High Level Power Estimation and Exploratio... |
DAC
1997
ACM
13 years 12 months ago
1997
ACM
A modeling approach is presented that captures the dependence of the power dissipation of a combinational logic circuit on its input output signal switching activity. The resulting...
MICRO
2003
IEEE
14 years 29 days ago
2003
IEEE
With power dissipation becoming an increasingly vexing problem across many classes of computer systems, measuring power dissipation of real, running systems has become crucial for...
PATMOS
2004
Springer
14 years 1 months ago
2004
Springer
We present SoftExplorer, a tool to estimate and analyze the power and energy consumption of an algorithm from the C program. The consumption of every loop is analyzed, and the inï¬...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Traditional RTL power optimization techniques commit transformations at the RTL based on the estimation of area, delay and power. However, because of inadequate power and delay in...
ISQED
2007
IEEE
14 years 2 months ago
2007
IEEE
We propose a methodology and power models for an accurate high-level power estimation of physically partitioned and power-gated SRAM arrays. The models offer accurate estimation o...