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» A Multi-level Approach to Program Synthesis
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FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
14 years 4 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
VTS
2007
IEEE
135views Hardware» more  VTS 2007»
14 years 2 months ago
High Level Synthesis of Degradable ASICs Using Virtual Binding
—As the complexity of the integrated circuits increases, they become more susceptible to manufacturing faults, decreasing the total process yield. Thus, it would be desirable to ...
Nima Honarmand, A. Shahabi, Hasan Sohofi, Maghsoud...
CODES
2009
IEEE
14 years 2 months ago
A variation-tolerant scheduler for better than worst-case behavioral synthesis
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
Jason Cong, Albert Liu, Bin Liu
DAC
2003
ACM
14 years 8 months ago
Performance-impact limited area fill synthesis
Chemical-mechanical planarization (CMP) and other manufacturing steps in very deep-submicron VLSI have varying effects on device and interconnect features, depending on the local ...
Yu Chen, Puneet Gupta, Andrew B. Kahng
ATAL
2005
Springer
14 years 1 months ago
Agent synthesis: partnership and agreement in cooperative mobile agents
This work focuses on an emerging extension to traditional agent models, called Hierarchical Mobile Agents model, where an agent can contain other agents recursively. The model ena...
Fuyuki Ishikawa, Yasuyuki Tahara, Nobukazu Yoshiok...