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» A Network Memory Architecture Model and Performance Analysis
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ICDM
2006
IEEE
147views Data Mining» more  ICDM 2006»
14 years 1 months ago
Adaptive Parallel Graph Mining for CMP Architectures
Mining graph data is an increasingly popular challenge, which has practical applications in many areas, including molecular substructure discovery, web link analysis, fraud detect...
Gregory Buehrer, Srinivasan Parthasarathy, Yen-Kua...
CLUSTER
2007
IEEE
14 years 2 months ago
Performance analysis of a user-level memory server
Abstract—Large-scale parallel applications often produce immense quantities of data that need to be analyzed. To avoid performing repeated, costly disk accesses, analysis of larg...
Scott Pakin, Greg Johnson
LCTRTS
2010
Springer
14 years 2 months ago
Versatile system-level memory-aware platform description approach for embedded MPSoCs
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
Robert Pyka, Felipe Klein, Peter Marwedel, Stylian...
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
14 years 23 days ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
AES
2011
Springer
232views Cryptology» more  AES 2011»
12 years 7 months ago
Reliable performance prediction for multigrid software on distributed memory systems
We propose a model for describing and predicting the parallel performance of a broad class of parallel numerical software on distributed memory architectures. The purpose of this ...
Giuseppe Romanazzi, Peter K. Jimack, Christopher E...