3629 search results - page 56 / 726 » A Network Memory Architecture Model and Performance Analysis |
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
HPDC
2010
IEEE
13 years 8 months ago
2010
IEEE
Automated analysis of unstructured text documents (e.g., web pages, newswire articles, research publications, business reports) is a key capability for solving important problems ...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
Compiler technology for multimedia extensions must effectively utilize not only the SIMD compute engines but also the various levels of the memory hierarchy: superword registers,...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
— Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latenc...