465 search results - page 6 / 93 » A New Approach for Low Power Scan Testing |
VTS
2002
IEEE
14 years 8 days ago
2002
IEEE
This paper presents a procedure for modifying a given set of scan vectors so that the peak power during scan testing is kept below a specified limit without reducing fault coverag...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Low power design techniques have been employed for more than two decades, however an emerging problem is satisfying the test power constraints for avoiding destructive test and im...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Growing test data volume and overtesting caused by excessive scan capture power are two of the major concerns for the industry when testing large integrated circuits. Various test...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
We propose to use MapReduce to quickly test new retrieval approaches on a cluster of machines by sequentially scanning all documents. We present a small case study in which we use...
ATS
2004
IEEE
13 years 11 months ago
2004
IEEE
Conventional serial connection of internal scan chains brings the power and time penalty. A novel parallel core wrapper design (pCWD) approach is presented in this paper for reduc...