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CVPR
2012
IEEE
11 years 9 months ago
Action bank: A high-level representation of activity in video
Activity recognition in video is dominated by low- and mid-level features, and while demonstrably capable, by nature, these features carry little semantic meaning. Inspired by the...
Sreemanananth Sadanand, Jason J. Corso
ML
2000
ACM
154views Machine Learning» more  ML 2000»
13 years 7 months ago
Lazy Learning of Bayesian Rules
The naive Bayesian classifier provides a simple and effective approach to classifier learning, but its attribute independence assumption is often violated in the real world. A numb...
Zijian Zheng, Geoffrey I. Webb
ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
14 years 21 days ago
Vectorless Analysis of Supply Noise Induced Delay Variation
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
Sanjay Pant, David Blaauw, Vladimir Zolotov, Savit...
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 15 days ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
JCP
2007
154views more  JCP 2007»
13 years 7 months ago
Partially Reconfigurable Vector Processor for Embedded Applications
—Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
Muhammad Z. Hasan, Sotirios G. Ziavras