2794 search results - page 40 / 559 » A New Architecture for Automated Modelling |
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Achieving high performance under a peak temperature limit is a first-order concern for VLSI designers. This paper presents a new model of a thermally-managed system, where a stoch...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
DEXA
1997
Springer
13 years 11 months ago
1997
Springer
Nowadays, if we want to obtain a sound and correct final software product it is very important to be able to properly join modern OO programming environments, which are built for ...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...