Sciweavers

2794 search results - page 525 / 559
» A New Architecture for Automated Modelling
Sort
View
IEEEPACT
2009
IEEE
15 years 3 months ago
ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs
Abstract--Chip-MultiProcessor (CMP) architectures are becoming more and more popular as an alternative to the traditional processors that only extract instruction-level parallelism...
Carlos Luque, Miquel Moretó, Francisco J. C...
CVPR
2012
IEEE
13 years 7 months ago
Compressive depth map acquisition using a single photon-counting detector: Parametric signal processing meets sparsity
Active range acquisition systems such as light detection and ranging (LIDAR) and time-of-flight (TOF) cameras achieve high depth resolution but suffer from poor spatial resolutio...
Andrea Colaco, Ahmed Kirmani, Gregory A. Howland, ...
160
Voted
HPCA
2006
IEEE
16 years 5 months ago
Completely verifying memory consistency of test program executions
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
Chaiyasit Manovit, Sudheendra Hangal
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
15 years 11 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
OOPSLA
2007
Springer
15 years 11 months ago
IAnticorruption: a domain-driven design approach to more robust integration
Custom House's new currency exchange system is integrated with a legacy system. After a few years of growth, the two systems were so intricately tangled that even small chang...
Sam Peng, Ying Hu