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DAC
2002
ACM
14 years 9 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
DELOS
2004
13 years 10 months ago
Peer-to-Peer Overlays and Data Integration in a Life Science Grid
Databases and Grid computing are a good match. With the service orientation of Grid computing, the complexity of maintaining and integrating databases can be kept away from the act...
Curt Cramer, Andrea Schafferhans, Thomas Fuhrmann
IEEEPACT
2008
IEEE
14 years 3 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
ATAL
2003
Springer
14 years 13 days ago
A false-name-proof double auction protocol for arbitrary evaluation values
We develop a new false-name-proof double auction protocol called the Generalized Threshold Price Double auction (GTPD) protocol. False-name-proofness generalizes strategyproofness...
Yuko Sakurai, Makoto Yokoo
3DPVT
2004
IEEE
155views Visualization» more  3DPVT 2004»
14 years 16 days ago
Markerless Human Motion Transfer
In this paper we develop a computer vision-based system to transfer human motion from one subject to another. Our system uses a network of eight calibrated and synchronized camera...
German K. M. Cheung, Simon Baker, Jessica K. Hodgi...