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» A Note on Designing Logical Circuits Using SAT
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ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
14 years 4 months ago
Integrated circuit design with NEM relays
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
Fred Chen, Hei Kam, Dejan Markovic, Tsu-Jae King L...
CORR
2006
Springer
125views Education» more  CORR 2006»
13 years 7 months ago
Reversible Logic to Cryptographic Hardware: A New Paradigm
Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed i...
Himanshu Thapliyal, Mark Zwolinski
TVLSI
1998
135views more  TVLSI 1998»
13 years 7 months ago
Wave-pipelining: a tutorial and research survey
— Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of hig...
Wayne P. Burleson, Maciej J. Ciesielski, Fabian Kl...
ICFP
2003
ACM
14 years 7 months ago
Representing reductions of NP-complete problems in logical frameworks: a case study
Under the widely believed conjecture P=NP, NP-complete problems cannot be solved exactly using efficient polynomial time algorithms. Furthermore, any instance of a NP-complete pro...
Carsten Schürmann, Jatin Shah
DAC
1999
ACM
13 years 11 months ago
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...