522 search results - page 79 / 105 » A Note on Designing Logical Circuits Using SAT |
GECCO
2003
Springer
14 years 1 months ago
2003
Springer
This poster paper summarizes our research on fault tolerance arising as a by-product of the evolutionary computation process. Past research has shown evidence of robustness emergin...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Binary Decision Diagrams (BDDs) often fail to exploit sharing between Boolean functions that differ only in their support variables. In a memory circuit, for example, the function...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
UC
2010
Springer
13 years 5 months ago
2010
Springer
We study Life-like cellular automaton rule B2/S2345. This automaton exhibits a chaotic behavior yet capable for purposeful computation. The automaton implements Boolean gates via p...
FPGA
2007
ACM
14 years 2 months ago
2007
ACM
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...