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» A Novel Approach for EMI Design of Power Electronics
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DATE
2010
IEEE
161views Hardware» more  DATE 2010»
14 years 1 months ago
Aging-resilient design of pipelined architectures using novel detection and correction circuits
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
Hamed F. Dadgour, Kaustav Banerjee
VLSI
2005
Springer
14 years 1 months ago
Pareto Points in SRAM Design Using the Sleepy Stack Approach
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption a...
Jun-Cheol Park, Vincent John Mooney III
AHS
2007
IEEE
241views Hardware» more  AHS 2007»
14 years 2 months ago
Extreme Temperature Electronics - from Materials to Bio-inspired Adaptation
Biological systems have inherent mechanisms which ensure their adaptation and thus survival — preservation of functionality, despite extreme and varying environments. One such e...
Dragana Laketic, Pauline C. Haddow
ISQED
2002
IEEE
106views Hardware» more  ISQED 2002»
14 years 25 days ago
Trading off Reliability and Power-Consumption in Ultra-low Power Systems
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
Atul Maheshwari, Wayne Burleson, Russell Tessier
ISLPED
1998
ACM
95views Hardware» more  ISLPED 1998»
14 years 4 days ago
The petrol approach to high-level power estimation
High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-...
Rafael Peset Llopis, Kees G. W. Goossens