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ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
14 years 4 months ago
Fast and robust quadratic placement combined with an exact linear net model
— This paper presents a robust quadratic placement approach, which offers both high-quality placements and excellent computational efficiency. The additional force which distrib...
Peter Spindler, Frank M. Johannes
ISQED
2009
IEEE
91views Hardware» more  ISQED 2009»
14 years 2 months ago
Variability-aware optimization of nano-CMOS Active Pixel Sensors using design and analysis of Monte Carlo experiments
We propose a novel design flow for mismatch and processvariation aware optimization of nanoscale CMOS Active Pixel Sensor (APS) arrays. As a case study, an 8 × 8 APS array is de...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
14 years 1 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
DATE
2007
IEEE
86views Hardware» more  DATE 2007»
14 years 1 months ago
Reduction of detected acceptable faults for yield improvement via error-tolerance
Error-tolerance is an innovative way to enhance the effective yield of IC products. Previously a test methodology based on error-rate estimation to support error-tolerance was pro...
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer
ASPLOS
2004
ACM
14 years 27 days ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...