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» A Novel Method to Improve the Test Efficiency of VLSI Tests
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GLVLSI
2005
IEEE
118views VLSI» more  GLVLSI 2005»
14 years 1 months ago
High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
Vishal Suthar, Shantanu Dutt
BMCBI
2006
139views more  BMCBI 2006»
13 years 7 months ago
Improvement in accuracy of multiple sequence alignment using novel group-to-group sequence alignment algorithm with piecewise li
Background: Multiple sequence alignment (MSA) is a useful tool in bioinformatics. Although many MSA algorithms have been developed, there is still room for improvement in accuracy...
Shinsuke Yamada, Osamu Gotoh, Hayato Yamana
DAC
2003
ACM
14 years 22 days ago
Test generation for designs with multiple clocks
To improve the system performance, designs with multiple clocks have become more and more popular. In this paper, several novel test generation procedures are proposed to utilize ...
Xijiang Lin, Rob Thompson
DFT
2009
IEEE
210views VLSI» more  DFT 2009»
13 years 10 months ago
Optimizing Parametric BIST Using Bio-inspired Computing Algorithms
Optimizing the BIST configuration based on the characteristics of the design under test is a complicated and challenging work for test engineers. Since this problem has multiple o...
Nastaran Nemati, Amirhossein Simjour, Amirali Ghof...
ISPD
2005
ACM
188views Hardware» more  ISPD 2005»
14 years 1 months ago
A semi-persistent clustering technique for VLSI circuit placement
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, S...