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248views
15 years 3 months ago
Equalizer: A Scalable Parallel Rendering Framework
Continuing improvements in CPU and GPU performances as well as increasing multi-core processor and cluster-based parallelism demand for flexible and scalable parallel rendering sol...
Stefan Eilemann, Maxim Makhinya, Renato Pajarola
ISCA
2003
IEEE
123views Hardware» more  ISCA 2003»
15 years 11 months ago
Detecting Global Stride Locality in Value Streams
Value prediction exploits localities in value streams. Previous research focused on exploiting two types of value localities, computational and context-based, in the local value h...
Huiyang Zhou, Jill Flanagan, Thomas M. Conte
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
15 years 11 months ago
Run-Time Management of Logic Resources on Reconfigurable Systems
Dynamically reconfigurable systems based on partial and dynamically reconfigurable FPGAs may have their functionality partially modified at run-time without stopping the operation...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
16 years 29 days ago
Model-based synthesis and optimization of static multi-rate image processing algorithms
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
Joachim Keinert, Hritam Dutta, Frank Hannig, Chris...
CODES
2009
IEEE
15 years 10 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...