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DATE
2009
IEEE
127views Hardware» more  DATE 2009»
16 years 27 days ago
Sequential logic synthesis using symbolic bi-decomposition
This paper uses under-approximation of unreachable states of a design to derive incomplete specification of combinational logic. The resulting incompletely-specified functions are...
Victor N. Kravets, Alan Mishchenko
DSD
2009
IEEE
126views Hardware» more  DSD 2009»
15 years 10 months ago
Architecture-Driven Synthesis of Reconfigurable Cells
In this paper, we present a novel method for merging sets of computational patterns into a reconfigurable cell respecting design constraints and optimizing specific design aspects...
Christophe Wolinski, Krzysztof Kuchcinski, Erwan R...
ASPDAC
2005
ACM
99views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Implication of assertion graphs in GSTE
- We address the problem of implication of assertion graphs that occur in generalized symbolic trajectory evaluation (GSTE). GSTE has demonstrated its powerful capacity in formal v...
Guowu Yang, Jin Yang, William N. N. Hung, Xiaoyu S...
ICCAD
1998
IEEE
117views Hardware» more  ICCAD 1998»
15 years 10 months ago
CONCERT: a concurrent transient fault simulator for nonlinear analog circuits
This paper presents a novel concurrent fault simulator (called CONCERT) for nonlinear analog circuits. Three primary techniques in CONCERT, including fault ordering, state predict...
Junwei Hou, Abhijit Chatterjee
COLING
2010
15 years 1 months ago
Opinion Summarization with Integer Linear Programming Formulation for Sentence Extraction and Ordering
In this paper we propose a novel algorithm for opinion summarization that takes account of content and coherence, simultaneously. We consider a summary as a sequence of sentences ...
Hitoshi Nishikawa, Takaaki Hasegawa, Yoshihiro Mat...