86 search results - page 12 / 18 » A Novel Superscalar Architecture for Fast DCT Implementation |
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
The verification of an execution against memory consistency is known to be NP-hard. This paper proposes a novel fast memory consistency verification method by identifying a new na...
DAC
2011
ACM
12 years 7 months ago
2011
ACM
In the era of deep sub-wavelength lithography for nanometer VLSI designs, manufacturability and yield issues are critical and need to be addressed during the key physical design i...
ISCC
2005
IEEE
14 years 1 months ago
2005
IEEE
—A framework for designing a family of novel fast CRC generation algorithms is presented. Our algorithms can ideally read arbitrarily large amounts of data at a time, while optim...
DAC
1999
ACM
14 years 1 days ago
1999
ACM
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
FPGA
2005
ACM
14 years 1 months ago
2005
ACM
This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be p...