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» A Partitioning Methodology for BDD-Based Verification
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MAM
2006
101views more  MAM 2006»
13 years 7 months ago
EPICURE: A partitioning and co-design framework for reconfigurable computing
This paper presents a new design methodology able to bridge the gap between an abstract specification and a heterogeneous recone architecture. The EPICURE contribution is the resu...
Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philip...
CAV
2007
Springer
164views Hardware» more  CAV 2007»
13 years 11 months ago
SAT-Based Compositional Verification Using Lazy Learning
Abstract. A recent approach to automated assume-guarantee reasoning (AGR) for concurrent systems relies on computing environment assumptions for components using the L algorithm fo...
Nishant Sinha, Edmund M. Clarke
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
14 years 1 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
SIGSOFT
2003
ACM
14 years 21 days ago
Use case-based testing of product lines
This paper presents PLUTO, a simple and intuitive methodology to manage the testing process of product lines, described as Product Lines Use Cases (PLUCs). PLUCs are an extension ...
Antonia Bertolino, Stefania Gnesi
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
13 years 11 months ago
Modeling design constraints and biasing in simulation using BDDs
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller,...