33 search results - page 6 / 7 » A Power Minimization Technique for Arithmetic Circuits by Ce... |
DAC
1996
ACM
13 years 11 months ago
1996
ACM
: We presentdesign-for-low-power techniques based on glitch reduction for register-transfer level circuits. We analyze the generation and propagation of glitches in both the contro...
TC
2008
13 years 7 months ago
2008
This paper describes a new on-demand wake-up prediction policy for reducing leakage power. The key insight is that branch prediction can be used to selectively wake up only the nee...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
TVLSI
1998
13 years 7 months ago
1998
Abstract— The growing popularity of look-up table (LUT)based field programmable gate arrays (FPGA’s) has renewed the interest in functional or Roth–Karp decomposition techni...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...