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DAC
2006
ACM
14 years 8 months ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 12 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
JOT
2002
105views more  JOT 2002»
13 years 7 months ago
Java Distributed Separate Objects
Java supports distributed programming using threads and Remote Method Invocation (JRMI). However, a Java thread does not match well with the object concept, and JRMI cannot easily...
Miguel Katrib, Iskander Sierra, Mario del Valle, T...
ATVA
2005
Springer
202views Hardware» more  ATVA 2005»
14 years 1 months ago
Model Checking Real Time Java Using Java PathFinder
Abstract. The Real Time Specification for Java (RTSJ) is an augmentation of Java for real time applications of various degrees of hardness. The central features of RTSJ are real t...
Gary Lindstrom, Peter C. Mehlitz, Willem Visser
ASPDAC
2006
ACM
116views Hardware» more  ASPDAC 2006»
14 years 1 months ago
A robust detailed placement for mixed-size IC designs
— The rapid increase in IC design complexity and wide-spread use of intellectual-property (IP) blocks have made the so-called mixed-size placement a very important topic in recen...
Jason Cong, Min Xie