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ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
14 years 25 days ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
MAS
1998
Springer
145views Communications» more  MAS 1998»
14 years 19 days ago
Language Issues in Mobile Program Security
Abstract. Many programming languages have been developed and implemented for mobile code environments. They are typically quite expressive. But while security is an important aspec...
Dennis M. Volpano, Geoffrey Smith
VW
1998
Springer
176views Virtual Reality» more  VW 1998»
14 years 19 days ago
A Mixed 2D/3D Interface for Music Spatialization
We propose a system for controlling in real time the localisation of sound sources. The system, called MidiSpace, is a real time spatializer of Midi music. We raise the issue of wh...
François Pachet, Olivier Delerue
GRID
2007
Springer
14 years 9 days ago
Optimizing multiple queries on scientific datasets with partial replicas
We propose strategies to efficiently execute a query workload, which consists of multiple related queries submitted against a scientific dataset, on a distributed-memory system in...
Li Weng, Ümit V. Çatalyürek, Tahs...
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
13 years 10 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner