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DAC
2004
ACM
14 years 8 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He
ISQED
2009
IEEE
117views Hardware» more  ISQED 2009»
14 years 2 months ago
Adaptive voltage controlled nanoelectronic addressing for yield, accuracy and resolution
An outstanding challenge for realizing nanoelectronic systems is nano-interface design, i.e., how to precisely access a nanoscale wire in an array for communication between a nano...
Bao Liu
ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
14 years 2 months ago
Robust differential asynchronous nanoelectronic circuits
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
Bao Liu
DAC
2003
ACM
14 years 1 months ago
4G terminals: how are we going to design them?
Fourth-generation wireless communication systems (4G) will have totally different requirements than what front-end designers have been coping with up to now. Designs must be targe...
Jan Craninckx, Stéphane Donnay
DATE
2006
IEEE
158views Hardware» more  DATE 2006»
14 years 1 months ago
Modeling multiple input switching of CMOS gates in DSM technology using HDMR
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
Jayashree Sridharan, Tom Chen