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ASPLOS
2010
ACM
14 years 2 months ago
Speculative parallelization using software multi-threaded transactions
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
Arun Raman, Hanjun Kim, Thomas R. Mason, Thomas B....
ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
11 years 10 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
CODES
2005
IEEE
14 years 1 months ago
Conflict analysis in multiprocess synthesis for optimized system integration
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
Oliver Bringmann, Wolfgang Rosenstiel, Axel Sieben...
EUROPAR
1997
Springer
13 years 11 months ago
Modulo Scheduling with Cache Reuse Information
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
Chen Ding, Steve Carr, Philip H. Sweany
IEEEPACT
2009
IEEE
14 years 2 months ago
Analytical Modeling of Pipeline Parallelism
Parallel programming is a requirement in the multi-core era. One of the most promising techniques to make parallel programming available for the general users is the use of parall...
Angeles G. Navarro, Rafael Asenjo, Siham Tabik, Ca...