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147
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ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
15 years 7 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
129
Voted
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 8 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
131
Voted
IPPS
2002
IEEE
15 years 7 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
214
Voted
FDL
2004
IEEE
15 years 6 months ago
Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems
gn process of embedded systems moves currently towards higher levels of abstraction. As a consequence, a need arises for an early and realistic assessment of system level design d...
P. Hastono, Stephan Klaus, Sorin A. Huss
98
Voted
DAC
2006
ACM
16 years 3 months ago
Synthesis of high-performance packet processing pipelines
Packet editing is a fundamental building block of data communication systems such as switches and routers. Circuits that implement this function are critical and define the featur...
Cristian Soviani, Ilija Hadzic, Stephen A. Edwards