7452 search results - page 104 / 1491 » A Semantics for Multiprocessor Systems |
150
Voted
SC
1995
ACM
15 years 7 months ago
1995
ACM
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
165
Voted
DSN
2011
IEEE
14 years 3 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
132
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ASPDAC
2009
ACM
15 years 10 months ago
2009
ACM
Abstract— In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufactu...
116
Voted
HPCA
1999
IEEE
15 years 8 months ago
1999
IEEE
Previous simulators for shared-memory architectures have imposed a large tradeoff between simulation accuracy and speed. Most such simulators model simple processors that do not e...
138
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MICRO
2008
IEEE
15 years 10 months ago
2008
IEEE
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...