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IPPS
1998
IEEE
14 years 3 days ago
Synthesis of a Systolic Array Genetic Algorithm
The paper presents the design of a hardware genetic algorithm which uses a pipeline of systolic arrays. Demostrated is the design methodology, where a simple genetic algorithm exp...
Graham M. Megson, I. M. Bland
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
13 years 11 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
FPL
2003
Springer
113views Hardware» more  FPL 2003»
14 years 1 months ago
Data Dependent Circuit Design: A Case Study
Abstract. Data dependent circuits are logic circuits specialized to specific input data. They are smaller and faster than the original circuits, although they are not reusable and...
Shoji Yamamoto, Shuichi Ichikawa, Hiroshi Yamamoto
CF
2008
ACM
13 years 9 months ago
Exact combinational logic synthesis and non-standard circuit design
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
Paul Tarau, Brenda Luderman
CHES
2007
Springer
126views Cryptology» more  CHES 2007»
14 years 2 months ago
How to Maximize the Potential of FPGA Resources for Modular Exponentiation
This paper describes a modular exponentiation processing method and circuit architecture that can exhibit the maximum performance of FPGA resources. The modular exponentiation arch...
Daisuke Suzuki