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DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 11 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky
ICCAD
1997
IEEE
106views Hardware» more  ICCAD 1997»
15 years 8 months ago
BIST TPG for faults in system backplanes
A built-in self-test (BIST) methodology to test system backplanes by using BIST functionality in each of its constituent boards is presented. Since the configurations of systems ...
Chen-Huan Chiang, Sandeep K. Gupta
PDC
2004
ACM
15 years 10 months ago
From small scale to large scale user participation: a case study of participatory design in e-government systems
Most experiments with participative design are with small scale, stand alone and not very strategic applications of ICT in organizations. However, modern ICT applications are incr...
Anne-Marie Oostveen, Peter Van den Besselaar
141
Voted
MSWIM
2005
ACM
15 years 10 months ago
Application of synchronous dynamic encryption system in mobile wireless domains
Motivated by the tradeoff between security and efficiency performance parameters that has been imposed on all modern wireless security protocols, we designed a novel security syst...
Hamdy S. Soliman, Mohammed Omari
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
15 years 8 months ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan