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» A Systematic Approach for Designing Testable VLSI Circuits
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VLSID
2002
IEEE
127views VLSI» more  VLSID 2002»
14 years 8 months ago
Design of Asynchronous Controllers with Delay Insensitive Interface
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behavior. Asynchronous speed...
Hiroshi Saito, Alex Kondratyev, Takashi Nanya
ICES
2003
Springer
86views Hardware» more  ICES 2003»
14 years 28 days ago
A Note on Designing Logical Circuits Using SAT
Abstract. We present a systematic procedure for the synthesis and minimisation of digital circuits using propositional satisfiability. We encode the truth table into a canonical s...
Giovani Gomez Estrada
CSUR
2000
141views more  CSUR 2000»
13 years 7 months ago
On built-in test reuse in object-oriented framework design
: Object-oriented frameworks have extended reusability of software from code modules to architectural and domain information. This paper further extends software reusability from c...
Yingxu Wang, Dilip Patel, Graham King, Ian Court, ...
ICCAD
1997
IEEE
131views Hardware» more  ICCAD 1997»
13 years 12 months ago
COSMOS: a continuous optimization approach for maximum power estimation of CMOS circuits
Maximum instantaneous power in VLSI circuits has a great impact on circuit's reliability and the design of power and ground lines. To synthesizehighlyreliablesystems,accurate...
Chuan-Yu Wang, Kaushik Roy
DFT
1997
IEEE
101views VLSI» more  DFT 1997»
13 years 12 months ago
Crosstalk Minimization in Three-Layer HVH Channel Routing
Crosstalk has become a major issue in VLSI design due to the high frequency, long interconnecting lines and small spacing between interconnects in today's integrated circuits...
Zhan Chen, Israel Koren