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» A Systematic Approach for Designing Testable VLSI Circuits
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GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
14 years 2 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 1 months ago
Droplet routing in the synthesis of digital microfluidic biochips
same level of system-level CAD support that is now commonplace in the IC industry.Recent advances in microfluidics are expected to lead to sensor systems for high-throughput bioche...
Fei Su, William L. Hwang, Krishnendu Chakrabarty
GLVLSI
2003
IEEE
180views VLSI» more  GLVLSI 2003»
14 years 1 months ago
3D direct vertical interconnect microprocessors test vehicle
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...
John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan...
DAC
2005
ACM
14 years 8 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
GECCO
2004
Springer
14 years 1 months ago
Designing Multiplicative General Parameter Filters Using Adaptive Genetic Algorithms
Multiplicative general parameter (MGP) approach to finite impulse response (FIR) filtering introduces a novel way to realize cost effective adaptive filters in compact very large s...
Jarno Martikainen, Seppo J. Ovaska