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» A Systematic Approach for Diagnosing Multiple Delay Faults
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DATE
2002
IEEE
98views Hardware» more  DATE 2002»
14 years 17 days ago
A New ATPG Algorithm to Limit Test Set Size and Achieve Multiple Detections of All Faults
Deterministic observation and random excitation of fault sites during the ATPG process dramatically reduces the overall defective part level. However, multiple observations of eac...
Sooryong Lee, Brad Cobb, Jennifer Dworak, Michael ...
SRDS
2008
IEEE
14 years 2 months ago
Systematic Structural Testing of Firewall Policies
Firewalls are the mainstay of enterprise security and the most widely adopted technology for protecting private networks. As the quality of protection provided by a firewall dire...
JeeHyun Hwang, Tao Xie, Fei Chen, Alex X. Liu
DATE
2006
IEEE
78views Hardware» more  DATE 2006»
14 years 1 months ago
Functional constraints vs. test compression in scan-based delay testing
We present an approach to prevent overtesting in scan-based delay test. The test data is transformed with respect to functional constraints while simultaneously keeping as many po...
Ilia Polian, Hideo Fujiwara
INFOCOM
2010
IEEE
13 years 6 months ago
Delay Analysis for Cognitive Radio Networks with Random Access: A Fluid Queue View
Abstract—We consider a cognitive radio network where multiple secondary users (SUs) contend for spectrum usage, using random access, over available primary user (PU) channels. Ou...
Shanshan Wang, Junshan Zhang, Lang Tong
IOLTS
2002
IEEE
99views Hardware» more  IOLTS 2002»
14 years 16 days ago
A BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques
This paper proposes a new solution for the diagnosis of faults into embedded RAMs, currently under evaluation within STMicroelectronics. The proposed scheme uses dedicated circuit...
Davide Appello, Alessandra Fudoli, Vincenzo Tancor...