452 search results - page 79 / 91 » A Systematic Process to Design Product Line Architecture |
DIMVA
2009
13 years 9 months ago
2009
The use of dynamic access control policies for threat response adapts local response decisions to high level system constraints. However, security policies are often carefully tigh...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
MICRO
2008
IEEE
14 years 2 months ago
2008
IEEE
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissi...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Efficient system-level design is increasingly relying on hierarchical design-space exploration, as well as compositional methods, to shorten time-to-market, leverage design re-use...
ETS
2006
IEEE
14 years 1 months ago
2006
IEEE
- The resources available on a chip continue to grow, following Moore's Law. However, the major process by which the benefits of Moore's Law accrue, which is the continui...