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ITC
1995
IEEE
13 years 11 months ago
1995
IEEE
An experiment has been designed to evaluate multiple testing techniques for combinational circuits. To perform the experiment, a 25k gate CMOS Test Chip has been designed, manufac...
ISCA
2000
IEEE
14 years 17 days ago
2000
IEEE
As microprocessors continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models and sy...
FORTE
1998
13 years 9 months ago
1998
: In this paper a co-design methodology based on multiformalism modelling is presented. It defines a platform that integrates different notations and, the necessary mechanisms to h...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platfo...
VISSYM
2004
13 years 9 months ago
2004
This paper reports on a new approach for visualizing multi-field MRI or CT datasets in an immersive environment with medical applications. Multi-field datasets combine multiple sc...