We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
We present a task-based taxonomy of navigation techniques for 3D virtual environments, used to categorize existing techniques, drive exploration of the design space, and inspire n...
Desney S. Tan, George G. Robertson, Mary Czerwinsk...
Designing and building Virtual Environments is not an easy task, especially when it comes to specifying object behavior where either knowledge about animation techniques or progra...
Bram Pellens, Frederic Kleinermann, Olga De Troyer
Because of the growing importance of decimal floating-point (DFP) arithmetic, specifications for it were recently added to the draft revision of the IEEE 754 Standard (IEEE P754)....
Charles Tsen, Michael J. Schulte, Sonia Gonzalez-N...
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...