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ICCD
2004
IEEE
134views Hardware» more  ICCD 2004»
14 years 5 months ago
An Automatic Test Pattern Generation Framework for Combinational Threshold Logic Networks
— We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanot...
Pallav Gupta, Rui Zhang, Niraj K. Jha
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
14 years 12 days ago
Algorithms for Solving Boolean Satisfiability in Combinational Circuits
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
Luís Guerra e Silva, Luis Miguel Silveira, ...
FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
14 years 2 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
CCGRID
2009
IEEE
13 years 6 months ago
A Live Storage Migration Mechanism over WAN for Relocatable Virtual Machine Services on Clouds
IaaS (Infrastructure-as-a-Service) is an emerging concept of cloud computing, which allows users to obtain hardware resources from virtualized datacenters. Although many commercial...
Takahiro Hirofuchi, Hirotaka Ogawa, Hidemoto Nakad...
ISMAR
2006
IEEE
14 years 2 months ago
Mixed reality pre-visualization and camera-work authoring in filmmaking
In this paper, we introduce the outline of “The MR-PreViz Project” performed in Japan. In the pre-production process of filmmaking, PreViz, pre-visualizing the desired scene b...
Ryosuke Ichikari, Keisuke Kawano, Asako Kimura, Fu...