60 search results - page 11 / 12 » A Test Point Insertion Algorithm for Mixed-Signal Circuits |
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
ASPDAC
2010
ACM
13 years 5 months ago
2010
ACM
As Double Patterning Lithography(DPL) becomes the leading candidate for sub-30nm lithography process, we need a fast and lithography friendly decomposition framework. In this pape...
VTS
2000
IEEE
13 years 12 months ago
2000
IEEE
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerabl...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...