60 search results - page 6 / 12 » A Test Point Insertion Algorithm for Mixed-Signal Circuits |
DATE
1998
IEEE
13 years 11 months ago
1998
IEEE
Functional scan chains are scan chains that have scan paths through a circuit's functional logic and flip-flops. Establishing functional scan paths by test point insertion (T...
TCAD
2008
13 years 7 months ago
2008
Abstract--A key design constraint of circuits used in handheld devices is the power consumption, mainly due to battery life limitations. Adaptive power management (APM) techniques ...
JUCS
2007
13 years 7 months ago
2007
: This paper describes a method of using Petri net P-invariants in system diagnosis. To model this process a net oriented fault classification is presented. Hence, the considered d...
ITC
2002
IEEE
14 years 11 days ago
2002
IEEE
Significant reductions in test application times can be achieved through parallelizing core tests; however, simultaneous test of various cores may result in exceeding power thres...
IOLTS
2006
IEEE
14 years 1 months ago
2006
IEEE
— Delay failures are becoming a dominant failure mechanism in nanometer technologies. Diagnosis of such failures is important to ensure yield and robustness of the design. Howeve...